Modification du PCB pour rentrer dans un boitier Plexo 240x190

circuit/circuit.kicad_pro

@@ -1,5 +1,6 @@
 {
   "board": {
+    "3dviewports": [],
     "design_settings": {
       "defaults": {
         "board_outline_line_width": 0.09999999999999999,
@@ -132,7 +133,15 @@
       "zones_allow_external_fillets": false,
       "zones_use_no_outline": true
     },
-    "layer_presets": []
+    "ipc2581": {
+      "dist": "",
+      "distpn": "",
+      "internal_id": "",
+      "mfg": "",
+      "mpn": ""
+    },
+    "layer_presets": [],
+    "viewports": []
   },
   "boards": [],
   "cvpcb": {
@@ -380,16 +389,13 @@
         "microvia_diameter": 0.3,
         "microvia_drill": 0.1,
         "name": "5A",
-        "nets": [
+        "nets": [],
-          "/12V_5A",
-          "Net-(F1-Pad2)"
-        ],
         "pcb_color": "rgba(0, 0, 0, 0.000)",
         "schematic_color": "rgba(0, 0, 0, 0.000)",
         "track_width": 2.032,
         "via_diameter": 0.8,
         "via_drill": 0.4,
-        "wire_width": 11.811023622047244
+        "wire_width": 11.0
       },
       {
         "bus_width": 12.0,
@@ -401,9 +407,7 @@
         "microvia_diameter": 0.3,
         "microvia_drill": 0.1,
         "name": "Phares",
-        "nets": [
+        "nets": [],
-          "/Phares"
-        ],
         "pcb_color": "rgba(0, 0, 0, 0.000)",
         "schematic_color": "rgba(0, 0, 0, 0.000)",
         "track_width": 1.016,
@@ -415,15 +419,33 @@
     "meta": {
       "version": 2
     },
-    "net_colors": null
+    "net_colors": null,
+    "netclass_assignments": null,
+    "netclass_patterns": [
+      {
+        "netclass": "5A",
+        "pattern": "/12V_5A"
+      },
+      {
+        "netclass": "5A",
+        "pattern": "Net-(F1-Pad2)"
+      },
+      {
+        "netclass": "Phares",
+        "pattern": "/Phares"
+      }
+    ]
   },
   "pcbnew": {
     "last_paths": {
       "gencad": "",
       "idf": "",
       "netlist": "circuit.net",
+      "plot": "",
+      "pos_files": "",
       "specctra_dsn": "",
       "step": "",
+      "svg": "",
       "vrml": ""
     },
     "page_layout_descr_file": ""